1. Field of the Invention
The present invention relates to semiconductor testing equipment which simultaneously conducts burn-in testing on a plurality of integrated circuits.
This Application is based on Japanese Patent Application No. Hei 9-109865, the contents of which are incorporated herein by reference.
2. Background Art
In recent years, the demand for integrated circuits has increased significantly. Enhancing the processing capability of equipment for testing the characteristics of semiconductor integrated circuits is desirable. In particular, it is desirable to be able to test a large number of integrated circuits simultaneously.
In conventional semiconductor testing equipment, a fixed period of time is typically required for testing a large number of integrated circuits. In such systems, the number of integrated circuits processed per unit time can not be increased. For example, for flash memory integrated circuits and the like, a decision regarding the results of the testing takes a long time because the results are not obtained until testing is completed for all the devices under test.